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2029–2031 edition · for exams from June 2029. Students sitting exams up to November 2028 follow the current course.

2210 · 04782029–2031 editionPaper 1 · Computer Systems and Logic§2.1, §2.2, §2.3

2. Logic circuits and hardware

Logic circuits, truth tables and expressions; the CPU and the fetch–decode–execute cycle in a von Neumann computer; primary and secondary storage and virtual memory.

What you need to know318 learning objectives, as printed in the syllabus

  1. 2.1Logic circuitsSame as now2026–2028 syllabus: §10

    The same circuits, truth tables and expressions — now on Paper 1 instead of Paper 2.

    Learning objectives (3)
    • 2.1.1Use logic gates to create logic circuits from a: (a) problem statement; (b) logic expression; (c) truth table
    • 2.1.2Complete a truth table from a: (a) problem statement; (b) logic expression; (c) logic circuit
    • 2.1.3Write a logic expression from a: (a) problem statement; (b) logic circuit; (c) truth table

    Circuits must be created for the statement given, without simplification

    Logic circuits will be limited to a maximum of three inputs and one output

  2. 2.2CPU architectureSame as now2026–2028 syllabus: §3.1

    Same CPU components and FDE cycle; embedded systems move to 6.1.

    Learning objectives (7)
    • 2.2.1Describe the role of the central processing unit (CPU) in a computer
    • 2.2.2Describe a microprocessor as a type of integrated circuit on a single chip
    • 2.2.3Describe the purpose of the components in a CPU, limited to the: (a) arithmetic logic unit (ALU); (b) control unit (CU); (c) program counter (PC); (d) memory address register (MAR); (e) memory data register (MDR); (f) current instruction register (CIR); (g) accumulator (ACC); (h) address bus; (i) data bus; (j) control bus; (k) cache; (l) cores; (m) clock
    • 2.2.4Describe the roles of the central processing unit (CPU) and random access memory (RAM) in the von Neumann architecture
    • 2.2.5Describe the process of the fetch–decode–execute (FDE) cycle, including the role of each component in the CPU, in a computer that has a von Neumann architecture
    • 2.2.6Explain how the number of cores, size of the cache and the clock speed can affect the performance of a CPU
    • 2.2.7Describe the purpose of an instruction set for a CPU
  3. 2.3Data storageChanged2026–2028 syllabus: §3.3

    Cache and registers listed as primary storage; secondary storage is magnetic and solid-state only (optical and legacy media removed); cloud moves to 3.4.

    Learning objectives (8)
    • 2.3.1Explain the purpose and the role of primary storage in a computer, limited to: (a) random access memory (RAM); (b) read only memory (ROM); (c) cache; (d) registers
    • 2.3.2Describe the similarities and differences between RAM and ROM
    • 2.3.3Explain the purpose and the role of secondary storage in a computer
    • 2.3.4Describe the similarities and differences between primary and secondary storage
    • 2.3.5Describe the operation of magnetic and solid-state storage, including how data is read from and written to each type of storage
    • 2.3.6Explain the differences between magnetic, and solid-state storage
    • 2.3.7Describe how virtual memory is created and used
    • 2.3.8Explain why virtual memory is necessary

Objectives quoted from the 2029–2031 syllabus, Version 1, September 2026; © Cambridge University Press & Assessment.

Notes3every learning objective explained, with worked examples

2.1Logic circuits

Logic circuits join the gates from §1.1 to make decisions. You must move between four forms of the same logic — a problem statement, a logic expression, a logic circuit and a truth table — for up to three inputs and one output, drawing circuits exactly as stated, without simplifying.

The four forms

  • Problem statement: words, e.g. 'The alarm X sounds if the door is open (A = 1) AND either the window is open (B = 1) OR the motion sensor is on (C = 1).'
  • Logic expression: X = A AND (B OR C). Use brackets to show which gate is worked out first.
  • Logic circuit: gate symbols wired together — here an OR gate for B and C, feeding an AND gate with A.
  • Truth table: every combination of inputs and the output for each.

Each gate in a circuit must have at most two inputs, and circuits have up to three inputs and one output. Build the circuit for the statement as written — do not simplify it.

Completing a truth table

With 3 inputs there are 2³ = 8 rows. List them in binary counting order (000 to 111) so none are missed. Add a working column for each gate, then the output.

X = A AND (B OR C)

ABCB OR CX
00000
00110
01010
01110
10000
10111
11011
11111

From a circuit, label the output of each gate (P, Q…), work out each label as a column, then the final output.

Writing an expression from a circuit or statement

From a circuit: start at the inputs and name each gate's output in words, working towards X. E.g. A and B go into NAND, C goes into NOT, both outputs into OR → X = (A NAND B) OR (NOT C).

From a statement: pick out the conditions and the joining words. 'Pump on if the tank is NOT full AND the timer is on, OR the override is pressed' → X = (NOT A AND B) OR C.

Keep the gate names (AND, OR, NOT, NAND, NOR, XOR) in capitals and bracket every gate that feeds another.

Writing an expression from a truth table

Use the rows where X = 1. For each such row, AND the inputs together, putting NOT in front of any input that is 0. Then OR the rows together.

ABCX
0111
1011

(all other rows X = 0) gives

X = (NOT A AND B AND C) OR (A AND NOT B AND C)

Because each gate may have only two inputs, a three-input AND is drawn as two AND gates chained: (NOT A AND B) AND C. The same rows let you draw a circuit from a truth table.

Checking your work in Python

A short loop prints the truth table of any expression, so you can check a hand-worked table:

from itertools import product

for a, b, c in product((0, 1), repeat=3):
    x = a and (b or c)
    print(a, b, c, int(bool(x)))

Exam tips

  • Always list truth-table inputs in counting order 000…111 — it stops you missing a row.
  • Use working columns for intermediate gates; examiners can then award marks per column.
  • Draw the circuit exactly as the statement or expression gives it — a simplified circuit may not get the marks.
  • Each gate is limited to two inputs (NOT has one); split a three-input AND/OR into two gates.
  • Make every wire join clearly at a gate input; mark joins with a dot when one input feeds two gates.

Mistakes that lose marks

  • Drawing an AND symbol for OR (or the reverse) — check the back of the shape.
  • Forgetting the bubble on NAND/NOR or the extra line on XOR.
  • Ignoring brackets: A AND B OR C is not the same as A AND (B OR C).
  • Writing only 4 rows for a 3-input truth table.

2.2CPU architecture

The CPU is the part of the computer that processes data and runs instructions. This section covers what is inside it (ALU, CU, registers, buses, cache, cores, clock), the von Neumann idea of storing programs and data together in RAM, the fetch–decode–execute cycle, what makes a CPU faster, and the instruction set.

The CPU and the microprocessor

The central processing unit (CPU) processes data and instructions to make the computer work: it fetches instructions from memory, decodes them and executes them (calculations, comparisons, moving data, controlling other parts).

A microprocessor is a CPU built as a type of integrated circuit on a single chip. Most computers, phones and many devices use one.

Components of the CPU

ComponentPurpose
Arithmetic logic unit (ALU)carries out calculations and logic operations (comparisons, AND/OR, shifts)
Control unit (CU)decodes instructions and sends control signals to manage the other components and the flow of data
Program counter (PC)holds the address of the next instruction to be fetched
Memory address register (MAR)holds the address of the memory location about to be read from or written to
Memory data register (MDR)holds the data or instruction just read from memory, or about to be written to it
Current instruction register (CIR)holds the instruction currently being decoded and executed
Accumulator (ACC)holds the result of calculations done in the ALU (a temporary store)
Address buscarries addresses from the CPU to memory — one direction only
Data buscarries data and instructions between CPU and memory — both directions
Control buscarries control signals (e.g. read, write, clock) — both directions
Cachesmall, very fast memory in or near the CPU holding frequently used data and instructions
Coreseach core is a processing unit that can fetch, decode and execute instructions on its own
Clocksends regular timing pulses that keep the CPU's operations in step

Von Neumann architecture

In a von Neumann computer, the program instructions and the data are both stored in the same memory (RAM), and the CPU fetches them over the same buses, one at a time.

  • RAM holds the program currently running and the data it is using.
  • The CPU fetches each instruction from RAM, decodes it and executes it, reading or writing data in RAM when needed.

This is the stored program concept: to run a different program you just load different instructions into memory.

The fetch–decode–execute cycle

Fetch

  1. The address in the PC is copied to the MAR (sent along the address bus).
  2. The PC is incremented (1 is added) so it points to the next instruction.
  3. The instruction at that address is sent along the data bus to the MDR (a read signal is sent on the control bus).
  4. The instruction is copied from the MDR to the CIR.

Decode

  1. The CU decodes the instruction in the CIR to work out what to do (the opcode) and on what (the operand).

Execute

  1. The instruction is carried out — e.g. the ALU does a calculation and the result goes to the ACC, or data is read from or written to memory through the MAR and MDR.
  2. The cycle repeats from the address now in the PC.

What affects CPU performance

FactorWhy more/bigger usually helpsLimits
Clock speed (GHz)more cycles per second, so more instructions are processed each secondmore heat and power; can overheat
Number of coresseveral instructions can be processed at the same time (in parallel)software must be written to use several cores; cores share buses and memory
Cache sizemore frequently used data is stored close to the CPU, so it is fetched faster than from RAM and RAM is accessed lesscache is expensive; past a point, more cache gives little gain

Instruction set

An instruction set is the list of all the machine code instructions a CPU can understand and execute (such as load, store, add, compare, jump). Each has its own binary opcode.

  • Programs must be translated into the machine code of that instruction set before they can run.
  • Different families of CPU have different instruction sets, so machine code for one will not run on another.

Exam tips

  • In FDE answers name the register at each step and say what moves where (PC → MAR, increment PC, data via the data bus to MDR, MDR → CIR, CU decodes).
  • Keep the PC and MAR apart: the PC holds the NEXT instruction's address, the MAR holds the address being accessed now.
  • For performance, explain the reason ('more instructions per second', 'faster to access than RAM') — not just 'it is faster'.
  • The address bus is one-way; the data bus is two-way — a common one-mark question.

Mistakes that lose marks

  • Saying the CU does calculations — that is the ALU.
  • Saying the PC holds the current instruction (that is the CIR).
  • Claiming doubling the cores always doubles the speed.
  • Describing von Neumann without saying data AND instructions share the same memory.

2.3Data storage

A computer needs fast memory the CPU can use directly (primary storage) and large, permanent storage for files (secondary storage). This section compares RAM, ROM, cache and registers, explains how magnetic and solid-state drives read and write data, and shows how virtual memory lets a computer run more than its RAM can hold.

Primary storage

Primary storage is directly accessed by the CPU.

TypePurpose and role
RAM (random access memory)holds the programs and data currently in use, including parts of the operating system. It is read and written; volatile (contents lost when power is off)
ROM (read only memory)holds the start-up instructions (the bootstrap / firmware such as the BIOS) needed when the computer is switched on. Read only; non-volatile
Cachevery fast, small memory holding frequently used instructions and data so the CPU waits less for RAM
Registerstiny, fastest storage inside the CPU (PC, MAR, MDR, CIR, ACC) holding the values being used in the current instruction

RAM and ROM compared

Similarities: both are primary storage; both are directly accessed by the CPU; both are on the motherboard/chips; both use random access.

RAMROM
volatilenon-volatile
can be read from and written tocan only be read (contents set when made)
holds programs and data in useholds the start-up (boot) instructions
usually much larger (GiB)usually small

Secondary storage

Secondary storage is non-volatile storage for files, programs and the operating system that must be kept when the power is off. It is not directly accessed by the CPU — data is first loaded into RAM.

Primary vs secondary:

PrimarySecondary
directly accessed by the CPUnot directly accessed; loaded into RAM first
mostly volatile (RAM)non-volatile
fasterslower
smaller capacity, more expensive per GiBmuch larger capacity, cheaper per GiB

Both store data in binary, and both are needed for the computer to run programs.

Magnetic storage (hard disk drive)

  • A hard disk has one or more platters coated in a magnetic material, spinning at high speed.
  • Each surface is divided into tracks and sectors.
  • A read/write head on a moving actuator arm moves across the platter to the right track.
  • Writing: the head magnetises tiny areas of the surface in one of two directions to represent 1 or 0.
  • Reading: the head detects the direction of magnetisation of each area as it passes underneath.

Solid-state storage (SSD, flash memory)

  • Solid-state storage has no moving parts. It uses NAND flash memory made of transistors arranged in a grid of cells.
  • Each cell uses a floating gate (and a control gate) to trap or release electrons.
  • Writing: a voltage pushes electrons onto the floating gate (or removes them), setting the cell to 0 or 1; the charge stays without power, so it is non-volatile.
  • Reading: a voltage is applied and the computer detects whether current flows, which tells it if the cell holds 0 or 1.
  • Data is written in pages and erased in blocks; each cell can only be rewritten a limited number of times.

Magnetic vs solid-state

Magnetic (HDD)Solid-state (SSD)
Moving partsyes — spinning platters and moving headsnone
Speedslower (head must move to the data)much faster read/write and start-up
Durabilitycan be damaged if dropped while runningmore robust; but limited write cycles
Power and heatuses more power, more heat, some noiseless power, silent, cooler
Cost and capacitycheaper per GiB, very large capacitiesmore expensive per GiB
Typical uselarge backups, servers storing lots of datalaptops, phones, tablets, boot drives

Virtual memory: how it is created and used

Virtual memory is an area of secondary storage (an HDD or SSD) that the operating system uses as if it were extra RAM.

  1. When RAM is full, the OS takes data/program parts that are not currently needed and moves them out of RAM to the virtual memory area on the drive.
  2. This frees RAM for the data that is needed now.
  3. When the moved data is needed again, it is swapped back into RAM (and something else is moved out).

Why it is necessary: it stops the computer crashing or refusing to open programs when RAM is full, so more or larger programs can run than RAM alone could hold.

Drawback: the drive is much slower than RAM, so heavy swapping makes the computer slow (disk thrashing).

Exam tips

  • When asked for the 'role' of RAM or ROM, say what each stores (programs/data in use vs start-up instructions), not just volatile/non-volatile.
  • Describe magnetic and solid-state storage in terms of how data is read and how it is written — both halves carry marks.
  • For virtual memory: secondary storage used as RAM when RAM is full; data not needed now is moved out, swapped back when needed.
  • For comparisons, write matching pairs (HDD slower BECAUSE of moving parts; SSD faster because no moving parts).

Mistakes that lose marks

  • Saying ROM stores 'the operating system' — it stores the start-up (boot) instructions.
  • Calling an SSD magnetic, or saying it uses lasers.
  • Saying virtual memory makes the computer faster — it lets more run but is slower than RAM.
  • Saying secondary storage is accessed directly by the CPU.

Infographics4download any diagram as PNG or SVG

From logic circuit to truth tableX = (A AND B) OR (NOT C). Work out the intermediate columns first — that is where the marks are.ABCANDNOTORXA AND BNOT CABCA AND BNOT CX000011001000010011011000100011101000110111111101Method1. Inputs: n inputs → 2ⁿ rows, count in binary 000 → 111.2. One column per gate output, left to right through the circuit.3. Final column X is the last gate’s output.4. Expression from circuit: work from inputs to output, bracketing each gate.Writing the expressionX = (A AND B) OR (NOT C)9618 Boolean algebra: X = A.B + C̄NAND/NOR/XOR circuits build the same way.Draw the correct gate shapes, inputs on the left, output on the right; lines that join must have a junction dot.Check: a circuit with 3 inputs must have 8 rows; a truth-table answer with fewer rows loses the mark.cswithzak.com

From logic circuit to truth table

O LevelASA2
Von Neumann architectureOne memory holds both instructions and data; CPU and memory talk over three buses.CPUControl Unitdecodes, sends signalsALUarithmetic & logicRegistersPC · MAR · MDR · CIR · ACCCachefast memory for frequently used dataMain memoryRAM — instructions + dataaddress bus →data bus ⇄control bus ⇄Address bus is unidirectional (CPU → memory). Its width sets the maximum addressable memory (n lines → 2ⁿ addresses).cswithzak.com

Von Neumann architecture

O LevelAS
Fetch – Decode – Execute cycleRegister transfer notation for the fetch stage — learn it word for word.FETCHinstruction from memoryDECODEcontrol unit interprets opcodeEXECUTEALU / registers / memoryrepeat (check for interrupts at the end of each cycle)1. MAR ← [PC]2. PC ← [PC] + 13. MDR ← [[MAR]]4. CIR ← [MDR]address of next instruction → MARincrement ready for the next fetchcontents of that address → MDRcopy the instruction into CIRcswithzak.com

Fetch–Decode–Execute cycle

O LevelAS
Primary, secondary & virtual storagePrimary = accessed directly by the CPU. Secondary = permanent, not directly accessed. Off-line =removable. Cloud = remote.PRIMARYRAM — volatile, read/write; holds therunning programs and data; more RAM= fewer swaps to virtual memory.ROM — non-volatile, read-only; holds thefirmware / bootstrap loader (BIOS)that starts the computer.SECONDARYMagnetic (HDD): spinning platters,r/w heads; cheap per GB; moving parts.Optical (CD/DVD/Blu-ray): laser readspits & lands on a spiral track.Solid state (SSD, flash): NAND transistors,no moving parts — fast, quiet, robust.OFF-LINE / CLOUDRemovable: USB flash, external HDD,optical discs — backups and transfer.Cloud: files stored on remote servers,accessed over the internet.+ anywhere access, automatic backup– needs connection, privacy, cost.Virtual memoryRAMpages of running programsHDD / SSDswap / page filepage out (not needed now)page in (needed again)Lets programs biggerthan RAM run; moreprograms at once.Slower than RAM;disk thrashing whenpages swap constantly.Why secondary storage? RAM is volatile — unsaved work is lost at power-off. Why RAM? It is far faster than any secondary storage.Sizes: bit → nibble → byte → KiB → MiB → GiB → TiB (×1024). Embedded systems keep their program in ROM/flash.cswithzak.com

Primary, secondary & virtual storage

O Level

Python for this topic1Python 3.10+, the only language on Paper 2 — runs in your browser

Key terms18use these exact words in the exam

truth tablelogic expressionALUcontrol unitprogram counterMARMDRCIRaccumulatorbuscachecoresclock speedinstruction setRAMROMsolid-statevirtual memory

Test yourself

Check you know the 2029–2031 content

Written for the new syllabus only: every card and question traces to a learning objective above. Rounds are random, and marks earn XP on your dashboard.

4 decks · 53 cards · 18 quiz questions.

From the current course

Most of this topic is taught in the 2026–2028 course today. Its notes and past-paper questions still help — skip anything the 2029–2031 syllabus removed (see the notes above).

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